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职位描述：
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Your Responsibilities:
The Market Sector Team (MST) BB within BL Cellular Systems develops, produces and sells advanced, highly integrated CMOS system base-band solution for Mobile & Personal. These are main part of the Nexperia Cellular System. Our main customers are Samsung and Sony Ericsson (both for GPRS/EDGE cellular phones). MST-BB Shanghai team is a new team, which cooperate with NXP other BB IC development center to design 2.5G, 3G and 3.5G base-band IC. NXP is a pioneer when it comes to development of new technology. NXP is leading in the field of mobile chips. MST-BB Shanghai team participate in the whole flow of Base-band IC design. The team will more focus on some low power and low cost IC design with advanced process.
Integrate the IP together and verify it to meet the DFx requirements.
Testconcept development/definition of new circuits.
DFT (design for testability): test concepts, test pattern generation, structural tests (scan), JTAG, CTAG, BIST
Development and documentation of test-hard- and software for test-systems according to production environment. Support/cooperation with product engineering.
Evaluation, introduce to production, failure-analysis and maintenance of test-programs.
Technical and administrational responsibility for own testconcepts, testprograms or/and modules.
Provision of support and assistance to team members.
Continuous enlargement of specialized knowledge. Acquisition and dissemination of know-how, in- and outside of the Department.
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职位要求：
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Your Profile:
Academic/Professional Qualification:- Bachelor or Master in Digital IC SOC Backend design, English understanding / speaking/writing
Work Experience:4 years of work experience in Digital IC design, including a minimum of 2 year experience DFT design.
Expertise/Skills:
a)Familiar with Synopsys, Mentor DFT tools;
b)Good command of written and spoken English.
One of following skill:
Digital IC design full design flow (front-end, synthesis, verification, back-end, validation & evaluation).
Integration and verification of complex IP’s like DSP, ARM, de/encodersDigital simulations .
CMOS Process know how
Release integration;
Physical layout checks, timing verification, chip finishing, bonding diagram.
Design for testability, test concepts, test pattern generation, structural tests (scan), JTAG, CTAG, BIST
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